IO Device:F75111 CIO Utility

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(define F75111 pin in F75111.h)
Current revision (19:44, 30 July 2024) (edit) (undo)
(The Sample code source you can download from)
 
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== The Sample code source you can download from ==
== The Sample code source you can download from ==
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Source file: [ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/CIO_Utility_Src_v3.0.7_w.zip CIO_Utility_Src_v3.0.7_w.zip]
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<Google Drive>
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Binary file: [ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/CIO_Utility_Bin_v3.0.7_x32_w.zip CIO_Utility_Bin_v3.0.7_x32_w.zip]
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Source file: [https://drive.google.com/file/d/1qOGVIk2nHyCFW1nIOhW8yunvbA2Kz2Hs/view?usp=sharing CIO_Utility_v3.1.1.0W_Src]
-
[ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/CIO_Utility_Bin_v3.0.7_x64_w.zip CIO_Utility_Bin_v3.0.7_x64_w.zip]<br />
+
 +
Binary file:
 +
[https://drive.google.com/file/d/1uJUcDarXVcQkwoSP0X2-owzqJDYyjHkx/view?usp=sharing CIO_Utility_v3.1.1.0W_Bin_x64]<br />
 +
 +
F75113 DLL :
 +
[https://drive.google.com/file/d/1QOUOK5JZGo-RofHfGasGkw42RtqL9QOZ/view?usp=sharing F75113.zip]
 +
 +
<FTP>
 +
<!--
 +
Source file: [ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/CIO_Utility_Src_v3.1.1.0_w.zip CIO_Utility_v3.1.1.0W_Src]
 +
 +
Binary file:
 +
[ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/CIO_Utility_Bin_v3.1.1.0_x64_w.zip CIO_Utility_v3.1.1.0W_Bin_x64]<br />
 +
-->
F75113 DLL :
F75113 DLL :
-
[ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/F75113.zip F75113.dll]
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[ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/windows_base/F75113.zip F75113.zip]
== MB Support List==
== MB Support List==
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{|class = 'sortable' border="2" cellpadding="4" cellspacing="0" style="margin: 1em 1em 1em 0; border: 1px #aaa solid; border-collapse: collapse;" id='506'
{|class = 'sortable' border="2" cellpadding="4" cellspacing="0" style="margin: 1em 1em 1em 0; border: 1px #aaa solid; border-collapse: collapse;" id='506'
|- bgcolor = #ccccff
|- bgcolor = #ccccff
-
!Ivybridge!!BayTrail !!Apollo Lake !!Skylake/Kabylake!!Coffee Lake!!Whiskey Lake!!Card
+
!Ivybridge!!BayTrail !!Apollo Lake !!Skylake/Kabylake!!Coffee Lake!!Whiskey Lake!!AMD!!Card!!Elkhart Lake
|-
|-
|
|
-
2I847H <br>
+
2I847H
-
3I847A/D/CW/NX/NM/HW <br>
+
3I847A/D/CW/NX/NM/HW
-
3I770A/CW <br>
+
3I770A/CW
-
CI847A/C CI770A/C<br>
+
CI847A/C CI770A/C
|
|
-
1I385A/H 1I386H <br>
+
1I385A/H 1I386H
-
2I380A 2I385A/CW 2I380NX 2I385BW/EW/HW/PW 2I386EW 2I382A 2I382DW <br>
+
2I380A 2I385A/CW 2I380NX 2I385BW/EW/HW/PW 2I386EW 2I382A 2I382DW
-
3I380A/CW/NX <br>
+
3I380A/CW/NX
-
ST385W/AW/CW<br>
+
ST385W/AW/CW
|
|
-
2I390CW 2I392CW <br>
+
2I390CW 2I392CW
-
3I390AW 3I390NX 3I393NX <br>
+
3I390AW 3I390NX 3I393NX
-
PM390CW WET3901<br>
+
PM390CW
|
|
-
2I610DW/HW 2I612CW<br>
+
2I610DW/HW 2I612CW
-
3I610DW 3I612DW 3I170DW/HW/NX<br>
+
3I610DW 3I612DW 3I170DW/HW/NX
-
ST610W<br>
+
ST610W
-
CI170A/C<br>
+
CI170A/C
-
PM610DW PM170DW<br>
+
PM610DW PM170DW
|
|
CI370DW
CI370DW
|
|
2I810D 3I810DW
2I810D 3I810DW
 +
|
 +
3A100DW
|
|
CIO116-G
CIO116-G
-
E691A
+
E691A
 +
|
 +
2I640DW
|-class='sortbottom'
|-class='sortbottom'
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//--------------------------------------------------------------------------------------------------------
//--------------------------------------------------------------------------------------------------------
#define GPIO1X_INPUT_DATA 0x12 // GPIO1X Input Data Register
#define GPIO1X_INPUT_DATA 0x12 // GPIO1X Input Data Register
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#define GPIO3X_INPUT_DATA 0x22 // GPIO2X Input Data Register
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#define GPIO2X_INPUT_DATA 0x22 // GPIO2X Input Data Register
#define GPIO3X_INPUT_DATA 0x42 // GPIO3X Input Data Register
#define GPIO3X_INPUT_DATA 0x42 // GPIO3X Input Data Register
//--------------------------------------------------------------------------------------------------------
//--------------------------------------------------------------------------------------------------------

Current revision

Contents

The Sample code source you can download from

<Google Drive>

Source file: CIO_Utility_v3.1.1.0W_Src

Binary file: CIO_Utility_v3.1.1.0W_Bin_x64

F75113 DLL : F75113.zip

<FTP> F75113 DLL : F75113.zip

MB Support List

IvybridgeBayTrail Apollo Lake Skylake/KabylakeCoffee LakeWhiskey LakeAMDCardElkhart Lake

2I847H 3I847A/D/CW/NX/NM/HW 3I770A/CW CI847A/C CI770A/C

1I385A/H 1I386H 2I380A 2I385A/CW 2I380NX 2I385BW/EW/HW/PW 2I386EW 2I382A 2I382DW 3I380A/CW/NX ST385W/AW/CW

2I390CW 2I392CW 3I390AW 3I390NX 3I393NX PM390CW

2I610DW/HW 2I612CW 3I610DW 3I612DW 3I170DW/HW/NX ST610W CI170A/C PM610DW PM170DW

CI370DW

2I810D 3I810DW

3A100DW

CIO116-G E691A

2I640DW

edit table

How to use this Demo Application

Image:CIOv3_2i2o.JPG Image:CIOv3_4i4o.JPG Image:CIOv3_8i8o.JPG
Image:CIOv3_16i16o.JPG Image:CIOv3_16i16o_75113.JPG Image:8i+8o.jpg Image:1i1o.jpg


Attention Please:You must be install vcredist_x86.exe when first time you run the F75111_DIO.exe DEMO AP,The vcredist_x86.exe include all required DLL file.

1. Press the select your test "2i2o","4i4o","4i4o*2","F75111CIO116","F75113CIO116","8i+8o","1i1o"

2. start test,select single mode or looptest

F75111 Layout Picture

Image:F75111_layout_Picture.jpg

Introduction F75111

Initial Internal F75111 port address (0x9c)

   define GPIO1X, GPIO2X, GPIO3X to input or output 
   and Enable WDT function pin 

Set F75111 DI/DO ( sample code as below Get Input value/Set output value )

   DO: InterDigitalOutput(BYTE byteValue))
   DI: InterDigitalInput()


PULSE mode

Sample to setting GP33, 32, 31, 30 output 1mS low pulse signal.

{ 
    this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_PULSE_CONTROL,       0x00);             //This is setting low,Level output
    this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_PULSE_WIDTH_CONTROL, 0x01);             //This selects the pulse width to 1mS
    this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_CONTROL_MODE,        0x0F);             //This is setting the GP33, 32, 31, 30 to output function.    
    this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_Output_Data ,        0x0F);             //This is setting the GP33, 32, 31, 30 output data.
}

Initial internal F75111

void F75111::InitInternalF75111()
{
    this->Write_Byte(F75111_INTERNAL_ADDR,GPIO1X_CONTROL_MODE  ,0x00);        //set GPIO1X to Input  function     
    this->Write_Byte(F75111_INTERNAL_ADDR,GPIO3X_CONTROL_MODE  ,0x00);        //set GPIO3X to Input  function
    this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_CONTROL_MODE  ,0xFF);        //set GPIO2X to Output function
    this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_OUTPUT_DRIVING,0xFF);        //set GPIO2X to Output Drving 

    this->Write_Byte(F75111_INTERNAL_ADDR,F75111_CONFIGURATION, 0x03);        //Enable WDT OUT function
}

Set output value

void F75111::InterDigitalOutput(BYTE byteValue)
{
     BYTE byteData = 0;
     byteData = (byteData & 0x01 )? byteValue + 0x01 : byteValue;
     byteData = (byteData & 0x02 )? byteValue + 0x02 : byteValue;
     byteData = (byteData & 0x04 )? byteValue + 0x04 : byteValue;
     byteData = (byteData & 0x80 )? byteValue + 0x08 : byteValue;
     byteData = (byteData & 0x40 )? byteValue + 0x10 : byteValue;
     byteData = (byteData & 0x20 )? byteValue + 0x20 : byteValue; 
     byteData = (byteData & 0x10 )? byteValue + 0x40 : byteValue;
     byteData = (byteData & 0x08 )? byteValue + 0x80 : byteValue;           // get value bit by bit
   
     this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_OUTPUT_DATA,byteData);    // write byteData value via GPIO2X output pin
}

Get Input value

BYTE F75111::InterDigitalInput()
{
    BYTE byteGPIO1X = 0;
    BYTE byteGPIO3X = 0;
    BYTE byteData   = 0;

    this->Read_Byte(F75111_INTERNAL_ADDR,GPIO1X_INPUT_DATA,&byteGPIO1X) ;   // Get value from GPIO1X
    this->Read_Byte(F75111_INTERNAL_ADDR,GPIO3X_INPUT_DATA,&byteGPIO3X) ;   // Get value from GPIO3X	

    byteGPIO1X = byteGPIO1X  & 0xF0;                                        // Mask unuseful value
    byteGPIO3X = byteGPIO3X  & 0x0F;                                        // Mask unuseful value

    byteData = ( byteGPIO1X & 0x10 )? byteData + 0x01 : byteData;
    byteData = ( byteGPIO1X & 0x80 )? byteData + 0x02 : byteData;
    byteData = ( byteGPIO1X & 0x40 )? byteData + 0x04 : byteData;	
    byteData = ( byteGPIO3X & 0x01 )? byteData + 0x08 : byteData;
	
    byteData = ( byteGPIO3X & 0x02 )? byteData + 0x10 : byteData;
    byteData = ( byteGPIO3X & 0x04 )? byteData + 0x20 : byteData;
    byteData = ( byteGPIO3X & 0x08 )? byteData + 0x40 : byteData;
    byteData = ( byteGPIO1X & 0x20 )? byteData + 0x80 : byteData;           // Get correct DI value from GPIO1X & GPIO3X
	
    return byteData;
}

define F75111 pin in F75111.h

//--------------------------------------------------------------------------------------------------------
#define    F75111_INTERNAL_ADDR        0x9C   //  OnBoard  F75111 Chipset
#define    F75111_EXTERNAL_ADDR        0x6E   //  External F75111 Chipset
//--------------------------------------------------------------------------------------------------------
#define    F75111_CONFIGURATION        0x03   //  Configure GPIO13 to WDT2 Function
//--------------------------------------------------------------------------------------------------------
#define    GPIO1X_CONTROL_MODE         0x10   //  Select Output Mode or Input Mode
#define    GPIO2X_CONTROL_MODE         0x20   //  Select GPIO2X Output Mode or Input Mode 
#define    GPIO3X_CONTROL_MODE         0x40   //  Select GPIO3X Output Mode or Input Mode 
//--------------------------------------------------------------------------------------------------------
#define    GPIO1X_INPUT_DATA           0x12   //  GPIO1X Input Data Register
#define    GPIO2X_INPUT_DATA           0x22   //  GPIO2X Input Data Register
#define    GPIO3X_INPUT_DATA           0x42   //  GPIO3X Input Data Register
//--------------------------------------------------------------------------------------------------------
#define    GPIO1X_OUTPUT_DATA          0x11   //  GPIO1X Output Data Register
#define    GPIO2X_OUTPUT_DATA          0x21   //  GPIO2X Output Data Register 
#define    GPIO3X_OUTPUT_DATA          0x41   //  GPIO3X Output Data Register
//--------------------------------------------------------------------------------------------------------
#define    GPIO1X_OUTPUT_DRIVING       0x1B   //  Select GPIO1X Output Driving Enable
#define    GPIO2X_OUTPUT_DRIVING       0x2B   //  Select GPIO2X Output Driving Enable
#define    GPIO3X_OUTPUT_DRIVING       0x4B   //  Select GPIO3X Output Driving Enable
//--------------------------------------------------------------------------------------------------------
#define    GPIO1X_PULSE_CONTROL        0x13   //  GPIO1x Level/Pulse Control Register
                                              //  0:Level Mode 
                                              //  1:Pulse Mode
#define    GPIO1X_PULSE_WIDTH_CONTROL  0x14   //  GPIO1x Pulse Width Control Register
#define    GP1_PSWIDTH_500US           0x00   //  When select Pulse mode:	500	us.
#define    GP1_PSWIDTH_1MS             0x01   //  When select Pulse mode:	1	ms.
#define    GP1_PSWIDTH_20MS            0x02   //  When select Pulse mode:	20	ms.
#define    GP1_PSWIDTH_100MS           0x03   //  When select Pulse mode:	100	ms.
//--------------------------------------------------------------------------------------------------------
#define    GPIO2X_PULSE_CONTROL        0x23   //  GPIO2x Level/Pulse Control Register
                                              //  0:Level Mode 
                                              //  1:Pulse Mode
#define    GPIO2X_PULSE_WIDTH_CONTROL  0x24   //  GPIO2x Pulse Width Control Register
#define    GP2_PSWIDTH_500US           0x00   //  When select Pulse mode:	500	us.
#define    GP2_PSWIDTH_1MS             0x01   //  When select Pulse mode:	1	ms.
#define    GP2_PSWIDTH_20MS            0x02   //  When select Pulse mode:	20	ms.
#define    GP2_PSWIDTH_100MS           0x03   //  When select Pulse mode:	100	ms.
//--------------------------------------------------------------------------------------------------------
#define    GPIO3X_PULSE_CONTROL        0x43   //  GPIO3x Level/Pulse Control Register
                                              //  0:Level Mode 
                                              //  1:Pulse Mode
#define    GPIO3X_Output_Data          0x41   //  GPIO3x Output Data Register 
#define    GPIO3X_PULSE_WIDTH_CONTROL  0x44   //  GPIO3x Pulse Width Control Register
#define    GP3_PSWIDTH_500US           0x00   //  When select Pulse mode:	500	us.
#define    GP3_PSWIDTH_1MS             0x01   //  When select Pulse mode:	1	ms.
#define    GP3_PSWIDTH_20MS            0x02   //  When select Pulse mode:	20	ms.
#define    GP3_PSWIDTH_100MS           0x03   //  When select Pulse mode:	100	ms.
//--------------------------------------------------------------------------------------------------------

Introduction F75113

F75113 Layout Picture

Image:F75113_layout_P.jpg

Base on 75113.Dll API function as below list

F75113_API bool _stdcall F75113_Init();
F75113_API BYTE	F75113_GetDigital_Low_Input();                   //BDI0-BDI7
F75113_API BYTE	F75113_GetDigital_High_Input();                  //BDI8-BDI15
F75113_API void	F75113_SetDigital_Low_Output(BYTE byteValue);    //BDO0-BDO7
F75113_API void	F75113_SetDigital_High_Output(BYTE byteValue);   //BDO8-BDO15

F75113_API void	F75113_SetWDT_Enable(BYTE byteTimer);            //For the F75113 on board 
F75113_API void	F75113_SetWDT_Disable();                         //For the F75113 on board
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