IO Device:F75111 CIO Utility Console under linux

From LEXWiKi

(Difference between revisions)
Jump to: navigation, search
(The Sample code source you can download from)
Current revision (16:47, 19 September 2024) (edit) (undo)
(Base on libF75111.a API function as below list)
 
(28 intermediate revisions not shown.)
Line 3: Line 3:
== The Sample code source you can download from ==
== The Sample code source you can download from ==
-
Source file: [https://drive.google.com/file/d/1V0VzvwqCg7askX-IzQj9LAZ0dEYg1vk7/view?usp=sharing CIO_Utility_Console_v1.4L_Src]
+
<Google Drive>
-
Binary file:
+
Source file: [https://drive.google.com/file/d/14QO67ToUVpBndn1U3ViwP1s8UgnSTnI2/view?usp=sharing CIO_Utility_Console_v1.7.0_Src]
-
[https://drive.google.com/file/d/1WwoIL55IeVdDb3YPjH3sPi8-i7IZwdzY/view?usp=sharing CIO_Utility_Console_v1.4L_Bin]
+
 
 +
Binary file: [https://drive.google.com/file/d/1OGTsRTM-uyTJUyxBrvw0_AASck2Sgu-t/view?usp=sharing CIO_Utility_Console_v1.7.0_Bin]
 +
 
 +
<FTP>
 +
 
 +
Source file: [ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/linux_base/console/CIO_Utility_Console_L_Src_v1.7.0.zip CIO_Utility_Console_v1.7.0_Src]
 +
 
 +
Binary file: [ftp://ftp.lex.com.tw/Engineer/SoftSupport/AP_Module/CIO_Uitlity/linux_base/console/CIO_Utility_Console_L_Bin_v1.7.0.zip CIO_Utility_Console_v1.7.0_Bin]
== MB Support List ==
== MB Support List ==
Line 138: Line 145:
== How to use this Demo Application ==
== How to use this Demo Application ==
-
[[Image:CIO Utility console 2022.jpg]]<br/>
+
[[Image:CIO Utility console.jpg]]<br/>
-
1. The program must control I/O device, when you use this you must change user to root, you can use this command "sudo su"<br/>
+
[[Image:CIO208.jpg]]<br/>
-
2.enter "./CIO_Utility_console -h"show help function<br/>
+
=== Step1. Unzip "CIO_Utility_Console_L_Bin_v1.7.0.zip" and change user permission ===
 +
The program must control I/O device. You must change user permission to "'''root'''". You could use this command "'''sudo su'''"<br/>
 +
 
 +
=== Step2. Execute program ===
 +
Enter "'''./CIO_Utility_console -h'''" to show help menu.<br/>
Example:<br/>
Example:<br/>
-
CIO_Utility_console --4i4o 1<br/>
+
CIO_Utility_console -w 1 -s h<br/>
 +
CIO_Utility_console -r 1<br/>
 +
CIO_Utility_console -W -s 0x0f<br/>
 +
CIO_Utility_console -R<br/>
 +
 
 +
=== Step3. Use'-o' to simple set F75111 DO pin status to high or low ===
 +
Enter "'''./CIO_Utility_console -o <CIO_SN> -s <Pin_Status>'''" to set DO pin status.<br/>
 +
 
 +
<br/>
 +
Pin_Status use 1 byte to indicate the status of the Pin.<br/>
 +
DO-0 is bit0, DO-1 is bit1, DO-2 is bit2 and DO-3 is bit3.<br/>
 +
 
 +
If Pin_Status value is 0x01 (0000 0001), means DO-0 pin will be set to high. Other pins will be set to low.<br/>
 +
Example: "'''./CIO_Utility_console -o 1 -s 1'''" means set CIO1 module DO-0 pin (0x01) status to high. And other pins to low.<br/>
 +
 
 +
If Pin_Status value is 0x03 (0000 0011), means DO-0 and DO-1 pin will be set to high. Other pins will be set to low.<br/>
 +
Example: "'''./CIO_Utility_console -o 1 -s 3'''" means set CIO1 module DO-0 and DO-1 pin (0x01 + 0x02) status to high. And other pins to low.<br/>
 +
 
 +
If Pin_Status value is 0x0f (0000 1111), means DO-0, DO-1, DO-2, DO-3 pins will be set to high. No pin will be set to low.<br/>
 +
Example: "'''./CIO_Utility_console -o 1 -s f'''" means set CIO1 module DO-0, DO-1, DO-2 and DO-3 pin (0x01 + 0x02 + 0x04 + 0x08) status will be set to high. No pin set to low.<br/>
 +
 
 +
If Pin_Status value is 0x00 (0000 0000), means DO-0, DO-1, DO-2, DO-3 pins will be set to low. No pin will be set to high.<br/>
 +
Example: "'''./CIO_Utility_console -o 1 -s 0'''" means set CIO1 module DO-0, DO-1, DO-2 and DO-3 pin status will be set to low. No pin set to high.<br/>
== F75111 Layout Picture ==
== F75111 Layout Picture ==
Line 153: Line 186:
and Enable WDT function pin
and Enable WDT function pin
-
=== Set F75111 DI/DO ( sample code as below Get Input value/Set output value )===
+
=== Base on libF75111.a API function as below list ===
-
DO: InterDigitalOutput(BYTE byteValue))
+
bool F75111_Init();
-
DI: InterDigitalInput()
+
bool F75111_4I4O_Init();
-
 
+
bool F75111_8I8O_Init();
-
=== PULSE mode ===
+
-
 
+
bool F75111_GetDigitalInput_Pin(int); //pin number 0-15
-
Sample to setting GP33, 32, 31, 30 output '''1mS''' low '''pulse''' signal.
+
BYTE F75111_GetDigitalInput();
-
<pre>
+
BYTE F75111_GetDigitalInput_4I4O(); //4I4O(CIO1)
-
{
+
BYTE F75111_GetDigitalInput_8I8O(); //8I(CIO1)+8O(CIO2)
-
this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_PULSE_CONTROL, 0x00); //This is setting low pulse output
+
-
this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_PULSE_WIDTH_CONTROL, 0x01); //This selects the pulse width to 1mS
+
bool F75111_SetDigitalOutput_Pin(BYTE pin_number,bool pin_status);
-
this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_CONTROL_MODE, 0x0F); //This is setting the GP33, 32, 31, 30 to output function.
+
void F75111_SetDigitalOutput(BYTE byteValue);
-
this->Write_Byte(F75111_INTERNAL_ADDR, GPIO3X_Output_Data , 0x0F); //This is setting the GP33, 32, 31, 30 output data.
+
void F75111_SetDigitalOutput_4I4O(BYTE byteValue);//20190828 add by Nico ,20200430 kk update
-
}
+
void F75111_SetDigitalOutput_8I8O(BYTE byteValue);
-
</pre>
+
void F75111_SetDigitalOutput_1i1o(BYTE byteValue);//20200504 jimmy update for wet3901
-
== Initial internal '''F75111''' ==
+
-
<pre>
+
BYTE F75111_GetWDTMode();
-
void F75111::InitInternalF75111()
+
void F75111_SetWDTMode(BYTE dwvalue);
-
{
+
-
this->Write_Byte(F75111_INTERNAL_ADDR,GPIO1X_CONTROL_MODE ,0x00); //set GPIO1X to Input function
+
void F75111_SetWDTEnable (BYTE byteTimer);
-
this->Write_Byte(F75111_INTERNAL_ADDR,GPIO3X_CONTROL_MODE ,0x00); //set GPIO3X to Input function
+
void F75111_SetWDTDisable ();
-
this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_CONTROL_MODE ,0xFF); //set GPIO2X to Output function
+
-
 
+
-
this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_OUTPUT_DRIVING,0xFF); //set GPIO2X to Output Drving
+
-
 
+
-
this->Write_Byte(F75111_INTERNAL_ADDR,F75111_CONFIGURATION, 0x03); //Enable WDT OUT function
+
-
}
+
-
</pre>
+
-
 
+
-
== Set output value ==
+
-
<pre>
+
-
void F75111::InterDigitalOutput(BYTE byteValue)
+
-
{
+
-
BYTE byteData = 0;
+
-
byteData = (byteData & 0x01 )? byteValue + 0x01 : byteValue;
+
-
byteData = (byteData & 0x02 )? byteValue + 0x02 : byteValue;
+
-
byteData = (byteData & 0x04 )? byteValue + 0x04 : byteValue;
+
-
byteData = (byteData & 0x80 )? byteValue + 0x08 : byteValue;
+
-
byteData = (byteData & 0x40 )? byteValue + 0x10 : byteValue;
+
-
byteData = (byteData & 0x20 )? byteValue + 0x20 : byteValue;
+
-
byteData = (byteData & 0x10 )? byteValue + 0x40 : byteValue;
+
-
byteData = (byteData & 0x08 )? byteValue + 0x80 : byteValue; // get value bit by bit
+
-
+
-
this->Write_Byte(F75111_INTERNAL_ADDR,GPIO2X_OUTPUT_DATA,byteData); // write byteData value via GPIO2X output pin
+
-
}
+
-
</pre>
+
-
== Get Input value ==
+
-
<pre>
+
-
BYTE F75111::InterDigitalInput()
+
-
{
+
-
BYTE byteGPIO1X = 0;
+
-
BYTE byteGPIO3X = 0;
+
-
BYTE byteData = 0;
+
-
 
+
-
this->Read_Byte(F75111_INTERNAL_ADDR,GPIO1X_INPUT_DATA,&byteGPIO1X) ; // Get value from GPIO1X
+
-
this->Read_Byte(F75111_INTERNAL_ADDR,GPIO3X_INPUT_DATA,&byteGPIO3X) ; // Get value from GPIO3X
+
-
 
+
-
byteGPIO1X = byteGPIO1X & 0xF0; // Mask unuseful value
+
-
byteGPIO3X = byteGPIO3X & 0x0F; // Mask unuseful value
+
-
 
+
-
byteData = ( byteGPIO1X & 0x10 )? byteData + 0x01 : byteData;
+
-
byteData = ( byteGPIO1X & 0x80 )? byteData + 0x02 : byteData;
+
-
byteData = ( byteGPIO1X & 0x40 )? byteData + 0x04 : byteData;
+
-
byteData = ( byteGPIO3X & 0x01 )? byteData + 0x08 : byteData;
+
-
+
-
byteData = ( byteGPIO3X & 0x02 )? byteData + 0x10 : byteData;
+
-
byteData = ( byteGPIO3X & 0x04 )? byteData + 0x20 : byteData;
+
-
byteData = ( byteGPIO3X & 0x08 )? byteData + 0x40 : byteData;
+
-
byteData = ( byteGPIO1X & 0x20 )? byteData + 0x80 : byteData; // Get correct DI value from GPIO1X & GPIO3X
+
-
+
-
return byteData;
+
-
}
+
-
</pre>
+
-
==define F75111 pin in F75111.h ==
+
-
<pre>
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define F75111_INTERNAL_ADDR 0x9C // OnBoard F75111 Chipset
+
-
#define F75111_EXTERNAL_ADDR 0x6E // External F75111 Chipset
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define F75111_CONFIGURATION 0x03 // Configure GPIO13 to WDT2 Function
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO1X_CONTROL_MODE 0x10 // Select Output Mode or Input Mode
+
-
#define GPIO2X_CONTROL_MODE 0x20 // Select GPIO2X Output Mode or Input Mode
+
-
#define GPIO3X_CONTROL_MODE 0x40 // Select GPIO3X Output Mode or Input Mode
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO1X_INPUT_DATA 0x12 // GPIO1X Input Data Register
+
-
#define GPIO3X_INPUT_DATA 0x22 // GPIO2X Input Data Register
+
-
#define GPIO3X_INPUT_DATA 0x42 // GPIO3X Input Data Register
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO1X_OUTPUT_DATA 0x11 // GPIO1X Output Data Register
+
-
#define GPIO2X_OUTPUT_DATA 0x21 // GPIO2X Output Data Register
+
-
#define GPIO3X_OUTPUT_DATA 0x41 // GPIO3X Output Data Register
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO1X_OUTPUT_DRIVING 0x1B // Select GPIO1X Output Driving Enable
+
-
#define GPIO2X_OUTPUT_DRIVING 0x2B // Select GPIO2X Output Driving Enable
+
-
#define GPIO3X_OUTPUT_DRIVING 0x4B // Select GPIO3X Output Driving Enable
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO1X_PULSE_CONTROL 0x13 // GPIO1x Level/Pulse Control Register
+
-
// 0:Level Mode
+
-
// 1:Pulse Mode
+
-
#define GPIO1X_PULSE_WIDTH_CONTROL 0x14 // GPIO1x Pulse Width Control Register
+
-
#define GP1_PSWIDTH_500US 0x00 // When select Pulse mode: 500 us.
+
-
#define GP1_PSWIDTH_1MS 0x01 // When select Pulse mode: 1 ms.
+
-
#define GP1_PSWIDTH_20MS 0x02 // When select Pulse mode: 20 ms.
+
-
#define GP1_PSWIDTH_100MS 0x03 // When select Pulse mode: 100 ms.
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO2X_PULSE_CONTROL 0x23 // GPIO2x Level/Pulse Control Register
+
-
// 0:Level Mode
+
-
// 1:Pulse Mode
+
-
#define GPIO2X_PULSE_WIDTH_CONTROL 0x24 // GPIO2x Pulse Width Control Register
+
-
#define GP2_PSWIDTH_500US 0x00 // When select Pulse mode: 500 us.
+
-
#define GP2_PSWIDTH_1MS 0x01 // When select Pulse mode: 1 ms.
+
-
#define GP2_PSWIDTH_20MS 0x02 // When select Pulse mode: 20 ms.
+
-
#define GP2_PSWIDTH_100MS 0x03 // When select Pulse mode: 100 ms.
+
-
//--------------------------------------------------------------------------------------------------------
+
-
#define GPIO3X_PULSE_CONTROL 0x43 // GPIO3x Level/Pulse Control Register
+
-
// 0:Level Mode
+
-
// 1:Pulse Mode
+
-
#define GPIO3X_Output_Data 0x41 // GPIO3x Output Data Register
+
-
#define GPIO3X_PULSE_WIDTH_CONTROL 0x44 // GPIO3x Pulse Width Control Register
+
-
#define GP3_PSWIDTH_500US 0x00 // When select Pulse mode: 500 us.
+
-
#define GP3_PSWIDTH_1MS 0x01 // When select Pulse mode: 1 ms.
+
-
#define GP3_PSWIDTH_20MS 0x02 // When select Pulse mode: 20 ms.
+
-
#define GP3_PSWIDTH_100MS 0x03 // When select Pulse mode: 100 ms.
+
-
//--------------------------------------------------------------------------------------------------------
+

Current revision


Contents

The Sample code source you can download from

<Google Drive>

Source file: CIO_Utility_Console_v1.7.0_Src

Binary file: CIO_Utility_Console_v1.7.0_Bin

<FTP>

Source file: CIO_Utility_Console_v1.7.0_Src

Binary file: CIO_Utility_Console_v1.7.0_Bin

MB Support List

IvybridgeBayTrailApollo LakeSkylake/KabylakeCard

2I847H

1I385A/H

2I390CW

2I610DW/HW

CIO116-G

3I8347A/CW

1I386HW

2I390CW

2I610HW

E691A

3I847NX/NM

2I380A/NX

3I390AW

3I610DW

3I847D(OEM)

2I382A

3I390D(OEM)

PM610DW

3I847HW

2I385A/BW/CW/EW/HW/PW

3I390NX

ST610W

CI847A/C

3I380A/CW/D/NX

3I393NX

3I170DW/HW/NX

3I770A/CW

3I385AW/CW

PM390CW

CI170A/C

CI770A/C

ST385W

PM170DW

edit table

How to use this Demo Application

Image:CIO Utility console.jpg
Image:CIO208.jpg

Step1. Unzip "CIO_Utility_Console_L_Bin_v1.7.0.zip" and change user permission

The program must control I/O device. You must change user permission to "root". You could use this command "sudo su"

Step2. Execute program

Enter "./CIO_Utility_console -h" to show help menu.

Example:
CIO_Utility_console -w 1 -s h
CIO_Utility_console -r 1
CIO_Utility_console -W -s 0x0f
CIO_Utility_console -R

Step3. Use'-o' to simple set F75111 DO pin status to high or low

Enter "./CIO_Utility_console -o <CIO_SN> -s <Pin_Status>" to set DO pin status.


Pin_Status use 1 byte to indicate the status of the Pin.
DO-0 is bit0, DO-1 is bit1, DO-2 is bit2 and DO-3 is bit3.

If Pin_Status value is 0x01 (0000 0001), means DO-0 pin will be set to high. Other pins will be set to low.
Example: "./CIO_Utility_console -o 1 -s 1" means set CIO1 module DO-0 pin (0x01) status to high. And other pins to low.

If Pin_Status value is 0x03 (0000 0011), means DO-0 and DO-1 pin will be set to high. Other pins will be set to low.
Example: "./CIO_Utility_console -o 1 -s 3" means set CIO1 module DO-0 and DO-1 pin (0x01 + 0x02) status to high. And other pins to low.

If Pin_Status value is 0x0f (0000 1111), means DO-0, DO-1, DO-2, DO-3 pins will be set to high. No pin will be set to low.
Example: "./CIO_Utility_console -o 1 -s f" means set CIO1 module DO-0, DO-1, DO-2 and DO-3 pin (0x01 + 0x02 + 0x04 + 0x08) status will be set to high. No pin set to low.

If Pin_Status value is 0x00 (0000 0000), means DO-0, DO-1, DO-2, DO-3 pins will be set to low. No pin will be set to high.
Example: "./CIO_Utility_console -o 1 -s 0" means set CIO1 module DO-0, DO-1, DO-2 and DO-3 pin status will be set to low. No pin set to high.

F75111 Layout Picture

Image:F75111_layout_Picture.jpg

Introduction

Initial Internal F75111 port address (0x9c)

   define GPIO1X, GPIO2X, GPIO3X to input or output 
   and Enable WDT function pin 

Base on libF75111.a API function as below list

bool	F75111_Init();
bool	F75111_4I4O_Init();
bool	F75111_8I8O_Init(); 

bool	F75111_GetDigitalInput_Pin(int);	//pin number 0-15
BYTE	F75111_GetDigitalInput();
BYTE	F75111_GetDigitalInput_4I4O();          //4I4O(CIO1)
BYTE	F75111_GetDigitalInput_8I8O();          //8I(CIO1)+8O(CIO2)

bool	F75111_SetDigitalOutput_Pin(BYTE pin_number,bool pin_status);
void	F75111_SetDigitalOutput(BYTE byteValue);
void    F75111_SetDigitalOutput_4I4O(BYTE byteValue);//20190828 add by Nico ,20200430 kk update
void	F75111_SetDigitalOutput_8I8O(BYTE byteValue);
void	F75111_SetDigitalOutput_1i1o(BYTE byteValue);//20200504 jimmy update for wet3901

BYTE	F75111_GetWDTMode();
void	F75111_SetWDTMode(BYTE dwvalue); 

void	F75111_SetWDTEnable    (BYTE byteTimer);
void	F75111_SetWDTDisable   ();
Personal tools