請先看『使用說明』
IO Device:SMBus
From LEXWiKi
Contents |
Write_Byte Mode
int SMBus::Write_Byte(WORD dwSlave, BYTE pCmd, BYTE pByte) { this->SMBus_Clear(); // Clear SMBus data first if (this->SMBus_Busy()) // Check SMBus busy or not, return busy if busy return SMBUS_BUSY; this->IO_Write(SMBHSTADD , dwSlave & ~1 ); // write address in first variable this->IO_Write(SMBHSTCMD , pCmd ); // write command in second variable this->IO_Write(SMBHSTDAT0 , pByte ); // write data in third variable this->IO_Write(SMBHSTCNT , SMBHSTCNT_START | SMBHSTCNT_BYTE); // Sent start command to SMBus control register return (int)this->SMBus_Wait(); // return wait command when SMBus finish the job }
Read_Byte Mode
int SMBus::Read_Byte(WORD dwSlave, BYTE pCmd, BYTE *pByte) { this->SMBus_Clear(); // Clear SMBus data first if (this->SMBus_Busy()) // Check SMBus busy or not, return busy if busy return SMBUS_BUSY; this->IO_Write(SMBHSTADD , dwSlave | 1 ); // write address in first variable this->IO_Write(SMBHSTCMD , pCmd ); // write command in second variable this->IO_Write(SMBHSTCNT , SMBHSTCNT_START | SMBHSTCNT_BYTE); // Sent start command to SMBus control register int ret = this->SMBus_Wait(); // Check SMBus Status if (ret == SMBUS_OK) // If SMBus Stand by { *pByte = (BYTE)this->IO_Read(SMBHSTDAT0) &0xFF; // Get SMBus host data value } return ret; // reture SMBus status }
Check Device (F75111)
BOOL SMBus::CheckDevice(WORD wDeviceAddress) { int ret; this->SMBus_Clear(); // Clear SMBus data first if (this->SMBus_Busy()) // Check SMBus busy or not, return busy if busy return SMBUS_BUSY; this->IO_Write(SMBHSTADD , wDeviceAddress & ~1 ); // write address in first variable this->IO_Write(SMBHSTCNT , SMBHSTCNT_START | SMBHSTCNT_SENDRECV); // Sent start command to SMBus control register ret = this->SMBus_Wait(); // Check SMBus Status if (ret == SMBUS_OK) // Check device exist or not, if exist return ture else false return TRUE; else return FALSE; }
SMBus_Clear
void SMBus::SMBus_Clear() { this->IO_Write(SMBHSTSTS ,0xFF); // Clear SMBus status this->IO_Write(SMBHSTDAT0,0x0 ); // Clear SMBus data }
SMBus_Wait
int SMBus::SMBus_Wait() { int timeout = SMBUS_TIMEOUT; DWORD dwValue; while (timeout--) { Sleep(10); // I/O Delay dwValue = IO_Read(SMBHSTSTS) & 0x00FF; // Read Host Status Register if( dwValue & SMBHSTSTS_INTR ) // if status value equal SMBHSTSTS_INTR, return SMBus_OK { //printf("SMBus Action Complection! %x\n",dwValue); return SMBUS_OK; } if( dwValue & SMBHSTSTS_FAILED ) // if status value equal SMBHSTSTS_FAILED, return SMBHSTSTS_FAILED { printf("SMBus Action FAILED! %x\n",dwValue); return SMBHSTSTS_FAILED; } if(dwValue & SMBHSTSTS_COLLISION) // if status value equal SMBHSTSTS_COLLISION, return SMBHSTSTS_COLLISION { printf("SMBus Action COLLISION! %x\n",dwValue); return SMBHSTSTS_COLLISION; } if(dwValue & SMBHSTSTS_ERROR) // if status value equal SMBHSTSTS_ERROR, return SMBHSTSTS_ERROR { printf("SMBus Action ERROR! %x\n",dwValue); return SMBHSTSTS_ERROR; } } return SMBUS_BUSY; // else return busy }
SMBus_Busy
BOOL SMBus::SMBus_Busy() { if( (this->IO_Read(SMBHSTSTS) & SMBHSTSTS_BUSY ) == 1 ) // Check SMBus status if equal SMBHSTSTS_BUSY return TRUE; // return true else return FALSE; // else retrun false }
IO_Write
void SMBus::IO_Write(WORD dwOffset, BYTE dwData) { SetPortVal(this->m_MapIOAddress+dwOffset, dwData,1); // Set dwData value to assigned address }
IO_Read
BYTE SMBus::IO_Read(WORD dwOffset) { DWORD dwAddrVal; GetPortVal(this->m_MapIOAddress+dwOffset,&dwAddrVal,1); // Get dwAddrVal value from assigned address return (BYTE)(dwAddrVal & 0x0FF); }
Define SMBus IO address
SMBus::SMBus() { this->m_MapIOAddress = 0x500; }
Define SMBus pin in SMBus.h
#define SMBHSTSTS 0x00 // SMBus Host Status Register Offset #define SMBHSTSTS_BUSY 0x01 // SMBus Host -> 0000-0001 Busy #define SMBHSTSTS_INTR 0x02 // SMBus Host -> 0000-0010 Interrupt / complection #define SMBHSTSTS_ERROR 0x04 // SMBus Host -> 0000-0100 Error #define SMBHSTSTS_COLLISION 0x08 // SMBus Host -> 0000-1000 Collistion #define SMBHSTSTS_FAILED 0x10 // SMBus Host -> 0001-0000 Failed //---------------------------------------------------------------------------------- #define SMBHSTCNT 0x02 // SMBus Host Contorl Register Offset #define SMBHSTCNT_KILL 0x02 // SMBus Host Contorl -> 0000 0010 Kill #define SMBHSTCNT_QUICK 0x00 // SMBus Host Contorl -> 0000 0000 quick (default) #define SMBHSTCNT_SENDRECV 0x04 // SMBus Host Contorl -> 0000 0100 Byte #define SMBHSTCNT_BYTE 0x08 // SMBus Host Contorl -> 0000 1000 Byte Data #define SMBHSTCNT_WORD 0x0c // SMBus Host Contorl -> 0000 1100 Word Data #define SMBHSTCNT_BLOCK 0x14 // SMBus Host Contorl -> 0001 0100 Block #define SMBHSTCNT_START 0x40 // SMBus Host Contorl -> 0100 0000 Start //---------------------------------------------------------------------------------- #define SMBHSTCMD 0x03 // SMBus Host Command Register Offset #define SMBHSTADD 0x04 // SMBus Host Address Register Offset #define SMBHSTDAT0 0x05 // SMBus Host Data0 Register Offset #define SMBHSTDAT1 0x06 // SMBus Host Data1 Register Offset #define SMBBLKDAT 0x07 // SMBus Host Block Data Register Offset //---------------------------------------------------------------------------------- // SMBus Bus Status Code //---------------------------------------------------------------------------------- #define SMBUS_OK 0x0 // SMBUS OK #define SMBUS_BUSY 0x1 // SMBUS BUSY #define SMBUS_INT 0x2 // SMBUS INTR #define SMBUS_ERROR 0x4 // SMBUS ERROR //---------------------------------------------------------------------------------- #define SMBUS_TIMEOUT 100